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ap/xxxxx

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random: 19:54 (2006.09.20:2 tech_notes#278 research#83 xxxxx_at_piksel_notes#37)

1) J.G Ballard's Atrocity Exhibition as closest to an (expanded, to some extent architectural) instruction set for an imaginary CPU.

yet to be codified

2) circular memory (bubble is similar).

Z80 17:50 (2006.09.20:1 tech_notes#277 research#82 xxxxx_at_piksel_notes#36)

(to test IOE expansion board)

Of interest here is the ghosting of registers:

There are two sets of six general purpose registers + accumulator and flag registers (duplicate set swopped (values exchanged) by the Exchange instruction) - "The alternate set allows operation in foreground-background mode or it may be reserved for very fast interrupt response."

(From Z80 product specification).

Further 16 -bit wide registers for index, stack pointer,program counter and split (down to 8-bit) interrupt and memory reset. Also interrupt and other flip-flops.

Instruction set:

divided into categories, and described as to mnemonics and opcode

also addressing mode

LD r,r'

EX DE,HL

INC r

NEG

NOP

ADD HL, ss

RLC r

BIT b, r

JP nn

CALL nn

IN A, (n)

see also: http://www.z80.info/#BASICS_INST

also:

Binary form of opcodes
   
  Example:   LD r,r'
 
the 8-bit binary opcode is
 
     01dddsss
 
   ...where "ddd" is a three-bit field specifying the destination,
  and "sss" is a three-bit field specifying the source.
 
is shown below as
                          r   r'
                      01 xxx xxx
 

overmapping Salo/Sadean life coding onto instruction sets

in the first instance (or with Alice/Looking Glass/Ripper whole codified mapping - to commence in process).

to start by way of circles as registers: circle of manias, circle of shit, circle of blood (with Pasolini borrowing from Dante's nine circles of hell).