ap/xxxxx

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VGA for FPGA: 17:10 (2006.09.15:3 tech_notes#270 fpga#6)

Using code from:

http://www.stanford.edu/class/ee183/handouts.shtml

we can do very simple sync and when asserted (when we can write as is visible) we can write 6 bits of piksel data (RGB 2 bits for each). next step generate video or connect prototype board pins direct to VGA (thru FPGA? as it has its own 33ohm series resistors or we just send sync out to proto pins and hardwire VGA)

overlaying of high and low level possible means of description 02:22 (2006.09.15:2 research#77 xxxxx_at_piksel_notes#31)

thus FPGA as hardware simulation/black box. lacks transparency in making available (in one direction only) such parallel means. software trick. from here to Lisp language as high level machine code in directly mapping onto lispcpu

Duchamp CPU/FPGA (large glass as model) 02:18 (2006.09.15:1 research#76 xxxxx_at_piksel_notes#30)

also mushroom cloud transparency/glass component (from xxxxx cover) defined within the dual CPU schematic

from here towards the artistic instruction set (Rechnender Raum)