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FPGA/VHDL/Lisp 16:24 (2006.10.20:1 fpga#21 research#98 tech_notes#295)

http://www.cs.utexas.edu/users/moore/acl2/v3-0/distrib/acl2-sources/books/workshops/1999/vhdl/

quote:

This directory contains the supporting files for Chapter 11, "Using Macros to Mimic VHDL", by Dominique Borrione, Philippe Georgelin, and Vanderlei Rodrigues, in "Computer-Aided Reasoning: ACL2 Case Studies", edited by M. Kaufmann, P. Manolios, J Moore (Kluwer, 2000, p.167-182).

and:

File fact.lisp is the example in Figure 1. It is the description of the circuit that computes the factorial function, using two concurrent processes. It uses the macros defined in the preceding file.