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For FPGA expansion (XST-3.0 board and XSA-50): 21:15 (2006.10.02:2 tech_notes#281 research#88 fpga#11)

FPGA Pins:

Hsync: 85 out

Vsync: 86 out

Input: Output: all bi-directional

0: 67 12

1: 39 13

2: 44 19

3: 46 20

4: 49 21

5: 57 22

6: 60 23

7: 62 26

notes: 11:18 (2006.10.02:1 research#87 tech_notes#280)

1] Salo (or any other film) modelled as/in Lisp process with a necessary overlap of (changed) language, structure and quotation - active language ie. that we do not simply slot the events of the film into an established framework but rather map the processes as/and characters.

2]. FPGA extension board tests (+5v) + VGA (need more headers). also test chess matrix interface. PCB photoboards. Daniel Paul Schreber. Notes...

3] Lisp cell structure to expand on. in the CPU/FPGA. a symbol

4] To collate the instruction set and the fictional data sheet with addition now of Alice instructions - Alice data bus or transmission lines ( And after that other voices went on (What a number of people there are in the carriage!' thought Alice), saying, `She must go by post, as she's got a head on her -- ' `She must be sent as a message by the telegraph -- ' )...

instructions such as "off with her head" stack head. Salo quotation cells