recent hardware notes [stock/nl martin/uk]::

latest log:: 2004
circuit diagram
recent asm

recent notes [martin]:: 

1) wake-up/reset -> power management stuff DONE
	retrieve appropriate data from nvram ->
	a) number of cells
	b) cell list/structures/data

is start nvram data existant ?


2) LCD display routines DONE


3) power management/sleep DONE


4) NVRAM storage/retrieval routines HALF DONE

to do: abstract paging

[divide nvram into cell meta-data = list/structure storage

 and cell raw data by pages]


5) now favouring RF communication (such as rfm tr1000 916mhz
transciever -- see motes stuff) ... means that is now only RF + sound
environment input


6) virtual machine ->

+ routines to handle stuff here - maths // lists etc.

cell structure - list of cells->

a) offset/pointer
b) length
c) lively
d) set of registers-> xp/wp/rp/gp/mp (? of gp and mp)

list management (linked list? in pic asm ... list of cells in memory =
pointers to structures) 

instructions-> reduced set of =

data parsing-> cell wall [is part of garbage collection?]

channels/data input + say/listen-> 

				one channel

kill cells/garbage->


a) max number of cells held in nvram - 32K 255x127byte pages

=
number of cells = 2 bytes (?)

list of cells (pointer to structure -> 2 bytes each

structures= offset=2bytes//length=1/lively=1/reg=4 say total=8 bytes

[no point sep list and structures + offset=pointer]

max length=127 (1 page)

so each cell takes up max 2+8+127=137 

237 cells approx  

// think of better way of dealing with vm

[also q how garbage collection works - retain cell identity]

7) bootloader is micro-bootloader - some changes to circuit for this



__ AP02 --- HardWare Design Considerations ____ ____________________________________________________________________ newlife@1010.co.uk stock@v2.nl ____________________________ For this project, "Artificial Paradise 02_01" the goal is to design a compact, autonomous computer-system, using Ultra-Low-Power components so it can be `fed' from (sun)light and `survive' without maintenance, for a period of 3 years or more. It wil generate beeps when the execution of an instruction in the Virtual-Machine's Program memory causes output. It will `listen' to it's environment, distinguishing between background noise and beeps of the kind that its `species' can generate *** Functionality ** The system must be able to: - run for some hours (6-8) on a fully charged battery - charge the battery in less than 6 hours of sunlight - go to `sleep' when the battery runs low, shutting down all peripherals, and wake up again when battery is (almost) fully charged - remeber its status during `sleep' - sample one aspect of its environment (sound) and collect the sampled data into its external `VM-Program Memory' - run thru the collected `code' in VM-ProgMem, cell by cell, and keep track of the time elapsed since a certain cell's last output was generated. - `speak' the output of cells being run as beeps. - erase cells in VM-ProgMem that have not produced any output for some time. - distinguish received sounds into `background noise' and `spoken words' (sequences of beeps sent by other, identical devices present in its environment) - report the activities of the VM on a 16-char alfanum LCD-display, if present. - connect via RS232 to a PC for programming / debugging / monitoring. ** The system will include: [See `HW114.pdf'] - a Low-Power MCU with on-board FlashROM & IO functions (PIC16F877) - a solar-panel - a 6V NiMH battery - battery-charging circuitry - hi-efficiency step-up voltage regulators (+5V & -5V) - a RS232-driver - a 14pin header to connect a standard AlfaNum LCD-display - Battery-voltage monitoring circuitry to handle Wake-Up & Reset - 32KB of NVRAM plus required address-latch. - a simple `audio amp' for a piezo-speaker. - analog Filter -> VCA -> RMS-decoder -> Filter circuitry for `sampling' audio ** Functional Break-down; [Parts numbers refer to `AP02_018.pdf'] * Supply Section: A 7.5V solar panel feeds into a battery-charging circuit that charges a 5-cell (6V) NiMH-battery pack. The charger will provide the charge current for charging the battery and, when it's full, maintain a supply current from the solar panel (As long as enough light is available) to keep the supply voltage a slight bit higher than the battery-voltage, effectively saving the battery's full charge for periods of darkness. The charger-circuit should also inform the PIC-MCU [U1] about the charge-status, and should never execute a `discharge & charge' cycle. Taking into account periods of relative darkness (ie. clouds) when charging or supplying power and also given the premise that the battery will never fully discharge, we decided to use NiMH-batteries. They are more compact than NiCd's of the same capacity and NiCd's would never last 3 years with the charging-pattern to be expected. The circuit is built around the TEA 1103 (0r 1102) chip from Philips [U4]. It uses a transisitor [T1] & mosfet [T7] pair to control the current flowing into the battery, measuring this current and the battery-voltage thru two resistor -networks [R9,R10,R11 & R5,R6,R8]. In the absence of light, the charger-circuit will shut down, a diode [D2] preventing any current from flowing from the battery back into the charger circuit. Jumpers can be used on the `Timing' header [J3] to adjust the charger's fast-charge time & top-off time. Trimmer [R12] can be used to adjust the supply-voltage that is maintained when the battery is full. This voltage should be adjusted to match exactly the battery-voltage. (too low and the battery will slowly drain, even if there's enough light; too high and the excess voltage will sink a small current into the battery, even if it is fully charged, wasteing precious solar energy...) The `LED' pin, connected to the PIC-MCU via [R18] gives an indication of the charge status to the PIC; ON = charging, OFF = full / not charging. The main +5V supply is handled by a regulated step-up switching voltage regulator built around Maxim's MAX761 chip [U6]. It is capable of generating a steady 5V output from input voltages as low as 2.7V by using the flyback voltage of the switched coil [L1], monitoring the output voltage thru a resistor-bridge [R1,R21]. This supply will continue to produce a clean 5V untill the battery is nearly empty, and then shut itself (and everything else) down. It is essential that the PIC-MCU shuts its preipherals down & goes to sleep BEFORE the +5V supply shuts off (see below; "Vbat monitoring & reset/wake up"). The supply-lines to the peripherals & the `audio amp' are switched by P-channel mosfets [T5, T6]. These mosfets require a gate-saturation voltage of -7V (with respect to their Source) to switch `on' completely. By including a charge-pump based -5V supply as well, we can drive the gates of these mosfets to almost -10V, and, at the same time it serves as the negative-supply rail for the analog audio-input circuitry... This -5V supply is established by a LT1054 chip from Linear Technology [U10] and two big capacitors [C20, C21]. The LT1054 itself monitors the output thru [R31,R29] and can be shut-down by th PIC-MCU when it goes to sleep. Transistor [T8] ensures that the -5V supply is disconnected completely from the chip when it shuts down, allowing it to rise to +5V instead (thru the analog circuiry and [R28}, closing the mosfets in the supply-lines to the peripherals. Ie: if the PIC shuts the -5V supply down, the audio-input circuit, audio-output, NVRAM+Latch and LCD-Display are shut-down with it. * Battery-Voltage Monitoring & Wake-Up The battery is connected to the AN0 input (pin 2)of the PIC via a resistor [R15], and clamped (limited) at 3.9V by a zener-diode [D3]. When this voltage drops below 3.0V for a certain time (to allow for fluctuations of the charge-current, when there's brief periods of darkness and the battery-voltage fluctuates around 3V) the PIC should shut-down the -5V supply & peripherals, release the Reset-Inhibit & go to `sleep'. The battery-voltage also controls the state of the `Wake-Up Reset' mechanism; if the votage rises above 4.6V (3.9V zener-drop + 0.7V Transistor-drop), transistor [T3] wil turn on, turning on transistor [T2] in turn, which charges a capacitor [C8] tru resistor [R13], causing a LO pulse on the PIC's Reset pin (pin 1). If the voltage drops below this threshold, both transistors will turn off, but the HI pulse generated by [C8] at this moment is absorbed by [D4,R14] and does NOT trigger a reset on the PIC. To avoid unwanted resets caused by the battery-voltage fluctuating around 4.6V, the PIC has RA4 (pin 6) connected to the base (input) of [T2]. Right after a wake-up, this pin must be driven low to Inhibit the Reset-mechanism. Just before going to sleep, (when Vbat < 3.0V) the PIC should release this output & make it Hi-Impedance (ie. an input) to enable the 4.6V Wake-Up pulse. !! WARNING: Driving RA6 HI will probably result in the destruction of transistor [T2]!! Don't... If the battery voltage drops even further after the PIC has gone to sleep, at 2.7V the main powersupply [U6] will shut down, waiting for the sunlight to charge the battery. At 3.0V, the main supply will start back up again, executing a power-on reset in the PIC, waking up the system. At this point, the PIC should measure the voltage on RA0, and, if it's still far below 3.9V, go back to sleep (releasing the Reset-Inhibit again) and wait for the 4.6V wake-up pulse. * Virtual-Machine Program Memory The Virtual Machine running on the PIC will store the collected data in variable-size blocks (cells) in an external 32kByte Non-Volatile RAM chip, a Dallas Semiconductor DS1230 [U2]. It has a special 28-pin package with a built-in battery to preserve the contents of the memory for upto 10 years, independent of the main power supply. This NVRAM will probably also store information about the internal status of the VM when it goes to sleep. The alternative is to store this information in the PIC's own Flash, alhought Flash has inherently a limited number of write-cycles, and writing to Flash will use more power than writing to NVRAM. However, it may be necessary to shut-down the peripherals, including the NVRAM and its address latch [U3], BEFORE this information has to be stored. Considering the available amount of port-pins on the PIC, and the expected power-consumption of 1 or 2 LS-TTL 8bit latches, we decided to address the 32kB NVRAM in a paged mode using 128-byte pages, directly addressable thru RB1-7 (pins 43-40) and using the 8bit databus RB0-7 (pins 19-22 & 27-30) and a 75LS573 latch [U3] to select page 0-255. RB0 (pin 33) is used to load the page-number present on the databus into the latch (`ALE' = `Address Latch Enable') Port E (pins 8-10) are used as `select' (RE2) `read' (RE0) and `write' (RE1) signals to the NVRAM, and serve a double function when accessing the LCD-display (see below). Also see "Software implementation Notes - Memory & Busses" below for expanations and examples of memory-access procedures. * LCD-Display A 1-line x 16-char alfanumeric LCD-module is also connected to the data bus, thru a 15-pin header & ribbon-cable, so it can be attached to or detached from the system at will. It is powered from the +5V supply thru mosfet [T5], so it can be shut-down when the PIC goes to sleep. It also has a seperate supply-line for the LCD-Backplane Voltage, allowing for a simple contrast-adjustment with one resistor [R19] and a trimmer [R20]. The LCD is accessed when `Select' is HI AND `ALE' is LO, also disabling the NVRAM+latch. The function of the `Read' & `Write' signals for the LCD is quite different from their functions for the NVRAM. For the LCD, the `Write' line toggles between writing TO (`Write' = LO) and reading FROM (`Write' = HI) the LCD, while the `Read' line selects whether the LCD's `Function Registers' (`Read' = LO) or `Data Memory' (`Read'= HI) is being adressed. A `Read Function Registers' condition (`Write' = HI & `Read' = LO) will always cause the LCD to put its status-byte onto the data bus. The `Function Registers' are written to configure the LCD, to clear the display and/or position the cursor. Its `Display Data Memory' is then written to, to actually display characters. By first selecting & then writing to the LCD's `Character Data Mamory' a few user-defined cahacters can be upladed to the display. (See "Software Implemetation Notes -> LCD" for an overview of the LCD's functions & how to implement them) * The RS232 Port. The PIC16F877 has a fully-configurable UART built in, communicating at 5V TTL-level thru pins 25 (TxD) & 26 (RxD). All that's needed to connect it to a PC-serial port is a buffer that can handle & generate the +/-12V RS232 levels. Maxim's MAX3221 chip [U5] is exactly that, in an ultra-low-power package. It requires only 4 external capacitors [C11-C14] and uses its own internal charge-pump to generate the necessary -12V & +12V from the single +5v supply. Whenever the serial inputs (PC- or PIC-side) remain inactive for 30 msec, the chip switches to stand-by, using only 4 uA, waiting for fresh input to wake it up again. The RS232-connector to the system also features a +Vin line, to supply the system with power from the PC, or a wall-adapter, making long programming/debugging sessions possible without the need for continuous sunlight. WARNING!! If this external supply will be more than 9V, it is advisable to temporarily disconnect the solar-panel. Do NOT supply more than 18V to the +Vin pin! * The `Audio' Output. So our system will generate beeps. as loud as it can, using as little energy as possible. We wanted to use an 'Alphabet' of four tones `pentatonically' spaced within one octave. (up 1 octave = frequency * 2, a potential cause for confusion when using the PIC's Capture & Compare susbsytem as frequency counter). By alwais `speaking' on two-tone words, the system will communicate 4 bits per word. (two MSbits with first tone, two LSbits with second tone) We chose to use a frequency range that is clearly audible for humans, carries quite far thru the air, and is present, in varying quantitioes, in every day sounds like people whistling, mobile telephones ringing, car-alarms going off, etc. The most effective device to produce these frequencies is a piezo-speaker, but because of their relaively high impedance (40-90 Ohm) and our low supply voltage (4-6V avg battery voltage) , it seemed nescesarry to use a step-up transformer [L2], driven by a double-bridge circuit [U9] with a matched capacitor [C18] to achieve `resonant' operation in the chosen frequency range (ie. if the Trafo/Capacitor pair is pulsed at one of the chose frequencies, it will `ring' generating an almost-perfect sine wave on the output of the Trafo.) The additional H-bridge logic [U7B, U7C, U8A] switches polarity on the primary with every other pulse from the PWM-output, effectively generating a (Vbat * 2) peak-to-peak ac-voltage on the Trafo's primary but also dividing the PWM frequency in half. This means, that to `beep' at frequency `0' (880 Hz) the PWM-output must generate pulses at 1660 Hz. Modulating the pulse-width will result in changes of volume. In theory, maximum volume is achieved when the pulse-width = 72% (0.5 * SQRT(2)), but in practise, this has to be determined by tests, as little differences between the actual PWM-frequency and the resonant frequency of the [L2] / [C18] pair will have a big influence on this parameter. (See "Software Implementation Notes -> PWM output" for frequencies/times list & examples) The power-supply line from the battery to the Half-Brige Driver ICL7667 [U9] is also switched by a mosfet [T6] to disable it when the PIC goes to sleep. * The `Audio' Input. This part of the system is a bit more complex, using 5 different stages of amplifiers and filters to `distill' from the microphone-input two signals of information about the received sounds. The Microphone-signal is first amplified (10x) by a preamp built around [U13D] and then filtered by a 3rd-order HiPass filter built around [U13C], cutting off any frequency-components under 800Hz. This signal is then fed into the Volatge Controlled Amplifier AD603 [U12] which amplifies it again, between 1x and 1000x, depending on the voltage present on its `Gain Contol' inputs (pins 1 & 2). [R37] can be used to adjust the `1x gain' offset voltage. The output of this VCA is presented to the input of the RMS-Decoder AD736 [U11] which filters, rectifies & averages the signal, returning a voltage that is directly proportional to the signal level at the VCA-Output. This voltage inversely controls the VCA's gain, (when it drops, the VCA's gain increases) and is also present on the PIC's analog input RA1 (pin 3). Trimmer [R34] is used to adjust the offset point, and [R35] to adjust the feedback-factor to the VCA. The output of the VCA is also fed into another filter, a 5th order LoPass filter built around [U13A] & [U13B], that cuts off all frequencies above 2400Hz and has a final gain of 5x, resulting in a 5V peak-to-peak maximum output swing. This output is (rather bluntly) rectified by a shottky-diode [D10], to chop-off the negative peaks, and presented to the `Capture & Compare' input of the PIC (CCP2, pin 16), to allow the PIC to measure the period between two positive peaks, measuring the frequency of the signal, when sudden changes of the `Level' input RA1 indicate that some sound is heard. (See "Software Implementation Notes -> Frequency Counter" for examples) The calibration of the RMS-VCA loop [R34], [R35], [R37] can be quite tricky without some constant sound-source. I reccomend unplugging the Mic from the circuit-board & attaching an adjustable tone-generator to the Mic input, & attaching a dual-trace oscilloscope to the VCA-input & VCA-output, and writing a little test-app for the PIC that constantly measures Analog Input RA1 & outputs to the RS232 port and/or the LCD-Display (using RA1 as a voltmeter, measuring not in volts, but in AD-converter-units, which is exactly what one wants to know). (See "Software Implementation Notes -> Calibration" for more details) *** Software Implementation Notes * Supply Section: RA5 (pin 7) is driven HI when charging and LO when battery is fully charged or when charging is stopped due to lack of light. RA2 (pin 4) must be configured as an input when the -5V supply is active. In this state it can be used to measure the LT1054's reference voltage. To shut down the -5V supply, it must be configured as output & driven LO RA0 is used as an input to monitor the actual battery-voltage. When this voltage drops below 3.0V for a certain time, the PIC must shut down the -5V supply & periperals, release the Reset-Inhibit and go to 'sleep'. RA4 is configured as an output and driven LO to inhibit the Wake-Up-Reset mechanism. Just before going to 'sleep' the PIC must make this pin an input to enable the Wake-Up reset. * Memory & Busses The 7bit address bus (RB1-7) is used to direct-address memory locations within the selected page. These pins, and `ALE' (RB0), will always be configured as outputs. The bi-directional 8bit data bus (RD0-7) should be configured as outputs when writing to NVRAM or to the LCD, or when setting the page-nuber, and as inputs when reading from NVRAM or the LCD. Switching this port beween in- & output has to be handled by software! Port E will also be configured as outputs. These three pins serve as the `select' (RE2) `read' (RE0) and `write' (RE1) signals to the peripherals (NVRAM, Latch & LCD). Together with `ALE' (RB0) they determine who is `listening' to the data bus and who is posting data on this bus. When `Select' (RE2) is LO, the NVRAM is enabled and the outputs of the latch will hold the mem-page number that was last stored in the latch. When `Select' is HI AND `ALE' is LO, the LCD-Display is 'Enabled' (meaning; connected to the databus) thru [T4] & [U7A], and the NVRAM is disconnected from the data bus. When `Select' is LO (NVRAM selected) AND `Write' is HI, driving `Read' LO will cause the NVRAM to put the contents of the memory-location selected by the page-latch & the address bus on the data bus. When `Select' is LO and `Write' is driven LO, the value currently present on the data bus will be stored in NVRAM at the location selected by the page-number & the address bus. In this case, the state of the `Read' line is ignored. !! WARNING: If `Select' & `Read' are both LO and `Write' & `ALE' are both HI, disaster will occur; The NVRAM will output some address' contents onto the data bus, which is immediately seen by the latch as a memory-page number & stored, because ALE is HI, and output to the NVRAM's addres lines, because `Select' is LO! As soon as this new memory-page is selected (unknown to the PIC!!) the contents of a byte in THIS page are put on the data bus and again stored in the latch as yet another memory-page... This process will loop, as fast as the access-time of the NVRAM allows, and will basically blurt random data onto the data bus untill `ALE' is brouht LO or `Read' and/or `Select' are brought HI... Special care should be taken in programming the VM that this situation can never occur! * NVRAM Access Examples: Set Memory Page step state/action 0 RD=1, WR=1, SEL=0, ALE=0, PortB are OUTPUTS, PortD are OUTPUTS 1 ALE=1 2 Write to PortD 3 ALE=0 Read From Current Page step state/action 0 RD=1, WR=1, SEL=0, ALE=0, PortB are OUTPUTS, PortD are INPUTS 1 Write (
*2) to PortB # (B[1-7] are
, B[0] = ALE = `0') 2 RD=0 3 Read from PortD 4 RD=1 Write To Current Page step state/action 0 RD=1, WR=1, SEL=0, ALE=0, PortB are OUTPUTS, PortD are OUTPUTS 1 Write (
*2) to PortB # (B[1-7] are
, B[0] = ALE = `0') 2 WR=0 3 Write to PortD 4 WR=1 * PWM Output The System `speaks' an alphabet of four tones each conveying a two-bit value, plus a fith tone as 'startbit' all five tones placed within one octave, to avoid the 'double- / half-frequency' problem when measuring received frequencies. (see below) In fact, we chose the 2nd octave above 'middle c', using the freauencies the Pentatonic scale starting on the key of a'' (880Hz) for the base-note. This way, all beeps generated will have a `harmonically pleasant' relation to each other, and all beeps will fit nicely into that famous A-Pentatonic scale (The `Blues' Scale in A) Because of the H-Bridge logic consisting of a Flip-Flop [U8A] and 2 AND-gates [U7B] & [U7C] the two sides of the primary are alternately switched to +Vbat with every PWM pulse, thus the AC-frequency generated in the transformer is half that of the PWM-pulses. The four frequencies to be generated are: Beep freq PWM freq PWM period Tone s: 880.00 Hz 1760.00 Hz 568.18 usec (= a) 0: 1046.50 Hz 2093.00 Hz 477.78 usec (= c) 1: 1174.66 Hz 2349.32 Hz 425.65 usec (= d) 2: 1318.51 Hz 2637.02 Hz 379.22 usec (= e) 3: 1567.98 HZ 3135.96 Hz 318.88 usec (= g) The PIC uses its `Timer2' for the PWM-timebase, this is an 8bit timer with prescaler, which runs dyrectly off the divice-clock. With a 4MHz Quartz, this means a 1MHz timer-clock or, a 1 usec resolution on Timer2. Unfortunately, at this resolution, 8bits is too small for the periods listed above. so we have to use the prescaler to divide the clock by 4, getting a 4 usec resolution. Obviously, at this resolution, we can't produce the exact pitches for the tones listed above. Also, the PWM-period is determined by the contents of the PR2-register + 1 !, so the value to be loaded into the PR2-Register is calculated by = int((